Careers

4+ years experience
Location : Penang, Malaysia

Job Description:

Hands-on experience with advanced technology nodes (16nm, 7nm, 5nm, or below).
Strong expertise in Physical Design Implementation and complete PnR (Place & Route) flow.
Proficient in:
Floorplanning
Power Planning
Placement Optimization
Clock Tree Synthesis (CTS)
Routing and Route Optimization
Timing Closure
Physical Verification and Sign-off
Experience in resolving congestion, DRC, LVS, IR Drop, and EM issues.
knowledge of STA, SI, and low-power design methodologies.
Hands-on experience with industry-standard EDA tools such as Cadence Innovus, Synopsys ICC2, PrimeTime, Tempus, and Calibre.
Scripting skills in TCL, Perl, Python, or Shell scripting for flow automation.
Ability to work independently and collaborate effectively with RTL, DFT, STA, and Verification teams.

4 to 8yrs
Bengaluru/Pune

Job Description:
"1) A good understanding of architectural aspects and RTL code at IP/Sub-system/SoC level
2) A good understanding of verification methodologies including SV-UVM/C based environment, transactors etc
3) Experience in building emulation models from scratch
4) Knowledge of Arm CPU cores, protocols including PCIe, USB, Ethernet, AMBA, UART/SPI/I2C, DDR, flash memories and their usage in SoC environments is necessary
5) Emulation experience on ZeBu/Veloce/Palladium, including compilation, test execution, debug, and performance.
6) Strong scripting skills including UNIX shell scripting, Perl, TCL etc
7) Support various emulation users
8) Must have worked in end-to-end Emulation of atleast 1-2 SoC programs in Sub-system and chip level"

Experience 3+ years
Location : Bengaluru
Job Description : *
The engineer should be well-versed in Verilog/VHDL RTL coding and experienced in using Mentor DfT tools and Cadence tools.

Key requirements include:
* Hands-on experience in scan insertion, JTAG, ATPG DRC, and coverage analysis
* Proficiency in simulation debug with timing/SDF
* Experience with LBIST and Mixed Signal Radar ICs is highly desirable
* Ability to debug and root cause simulation failures
* Must be proactive, collaborative, and detail-oriented, capable of exercising independent judgment
* Strong interpersonal and communication skills (both oral and written)
* Self-motivated and flexible